Testing and reconfiguration of VLSI linear arrays
نویسندگان
چکیده
منابع مشابه
Testing and Reconfiguration of VLSI Linear Arrays
Achieving fault tolerance through incorporation of redundancy and reconfiguration is quite common. In this paper we study the fault tolerance of linear arrays of N processors with k bypass links whose maximum length is g. We consider both arrays with bidirectional links and unidirectional links. We first consider the problem of testing whether a set of n faulty processors is catastrophic, i.e.,...
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Achieving fault-tolerance through incorporation of redundancy and recon-guration is quite common. In this paper we study the fault-tolerance of linear arrays of N processors with k bypass links whose maximum length is g. We consider both arrays with bidirectional links and unidirectional links. We rst consider the problem of testing whether a set of n faulty processors is catastrophic, i.e., pr...
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Abstmct-This paper deals with the issue of developing efficient algorithms for reconfiguring processor arrays in the presence of faulty processors and fixed hardware resources. The models discussed in this paper consist of a set of identical processors embedded in a flexible interconnection structure that is configured in the form of a mtangular grid. We first consider an array grid model based...
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Fault tolerance through the incorporation of redundancy and reconnguration is quite common. In a redundant linear array of processing elements, k redundant links of xed lengths are provided to each element of the array in addition to the regular links connecting neighboring processors. The redundant links may be activated to bypass faulty elements. The number and the distribution of faults can ...
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Reliability is one of the most important attributes of any system. Adding redundancy is one way to improve the reliability. In this paper, we consider linear VLSI arrays in which each processor has a set of redundant links to bypass faulty processor(s). It is known that patterns of faults occurring at strategic locations in such arrays can be catastrophic and may render the system unusable rega...
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ژورنال
عنوان ژورنال: Theoretical Computer Science
سال: 1998
ISSN: 0304-3975
DOI: 10.1016/s0304-3975(97)00238-7